NAND2Tetris Note 02 - Elementary Logic Gates

Elementary Logic Gates

NOT AND OR XOR => output 1 if inputs different MUX: => a, b, sel; if sel == 0: out = a, else: out = b DMUX: => in, sel (outputs a and b): if sel == 0: a = in else b = in

16-bit variants

NOT16 : 16 bits in and out AND16 : Two 16-bit inputs, One 16-it output OR16 : Two 16-bit inputs, One 16-it output

Multi-way variants

Or8Way : Single 16-bit input, 1 bit output Mux4Way16 : Four 16-bit inputs, One 2-bit “sel” input, One 8-bit output Mux8Way16 : Eight 16-bit inputs, One 3-bit “sel” input, One 8-bit ouput DMux4Way : Single 1-bit input, 2-bit selector, Four 1-bit outputs DMux8Way : Single 1-bit input, 3-bit selector, Eight 1-bit outputs

The multi-way mux and dmux can be implemented by composing the other mux/dmux components.


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